The term "coherency" and more particularly "cache coherency" as applied to MP computer systems refers to the process of tracking data that is moved between local memory and the cache memories of the multiple processors. For example, in a typical MP environment, each processor has its own cache memory while all of the processors (or a subset of all the processors) share a common memory. If processor 1 requests particular data from memory, an investigation must be made to determine if another processor has already accessed that data and is holding the most updated copy in that processor's cache memory. If this has occurred, the updated data is sent from that processor's cache memory to processor 1 and the read from memory is aborted. Thus, coherency or cache coherency refers to the process of tracking which data is in memory and which data has a more recent version in a processor's cache. While achieving coherency in an MP computing system is challenging, the challenge is increased when the multiple processors are clustered in subsets on local buses that are connected by a system bus (as shown in FIG. 1).
The prior art includes many techniques for achieving coherent cache operation. One well known technique is bus snooping and there is literature describing various bus snooping approaches.
Another technique utilizes a coherency directory. A coherency directory, in a basal form, consists of memory coupled to a local memory that tracks which processor or processor clusters have cached versions of a line for a particular memory entry. When processor 1 requests specific data in memory, the memory controller for that memory determines whether the requested data is available for transfer. The coherency directory will indicate if the data has been accessed by one or more processors and where those processors are located. Amongst other features, coherency directories permit efficient cache coherency within a computer system having a distributed or multi-level bus interconnect.
A disadvantageous aspect of coherency directories, however, is that they will occasionally fail due to their implementation in solid state memory devices and also due to problems in interconnected circuitry. Failure of coherency directories (direct failure or through failure of related components), may lead to dramatic system crashes, the loss of valuable data and the inability of the system to carry on even at a reduced performance level.